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Turbomeca, a leading producer of helicopter engines, was facing challenges in developing the embedded software that runs the control system for each engine family. The model-based design approach they adopted used simulation tools for rapid prototyping, software testing, and verification. However, this approach required time-consuming manual coding, which could potentially introduce coding errors and inconsistencies between the code and the model. To keep pace with new innovations in helicopter technology and to remain compliant with DO-178B/C standards, Turbomeca needed tools that would help them code more efficiently, reduce errors, and improve code management.

Energomash Group Enterprises, one of the largest manufacturers of power equipment in Russia, faced a significant challenge in their operations. The company, which is engaged in developing and manufacturing equipment for various types of power stations and pumps, as well as operating their own gas turbine plant and developing electric and thermal energy, needed to improve their mesh generation process. The requirements for this process included the construction of qualitative mesh structures that could be adapted for the specificity of the investigated process, integration with the CAD system, and a reduction in the time required for mesh structure construction for typical problems.

DePuy Spine Inc., a leading supplier of orthopedic spinal implants, has been striving to improve the behavior of total disc replacement implants, particularly the CHARITÉ artificial disc. This three-piece articulating device is designed to eliminate pain and maintain motion of the operative segment, offering an alternative to spinal fusion surgery. However, understanding the effect of implant placement within the disc space on the loading of the facets, known to generate pain when supraphysiologically loaded, posed a significant challenge. Traditional studies involving cadaveric testing with strain gauges and pressure sensors were time-consuming, expensive, and often inconclusive. The company needed a more efficient and accurate method to understand and optimize the performance of the CHARITÉ artificial disc.

KTM Technologies was tasked with the development of the KTM X-Bow, a unique super sports car featuring a monocoque made from carbon composites materials. The monocoque, the external skin of the vehicle, provides structural support, marking it as the world's first production car with such a feature. The challenge lay in the use of carbon composites, which, while ideal for their lightweight and high strength properties, presented engineering complexities. The process of engineering composites designs from concept to simulation and manufacturing included countless opportunities for engineers to choose materials, fiber orientation, manufacturing methods, and layup arrangements. The KTM X-Bow monocoque was to be manufactured using over 300 pre-cut composite plies, adding to the complexity of the task. The challenge was to address these complexities in composites engineering to develop one of the world's most exciting and modern sports cars.

TibaRay, Inc. is a startup aiming to design the next generation of radiation therapy (RT) systems for cancer treatment. The existing RT systems face significant challenges, including collateral damage to normal organs, the need for better accuracy/focusing, motion control, and cost and accessibility issues, particularly in the developing world. TibaRay's proposed product, PHASER, is designed to address these challenges. However, the design of PHASER would not be possible without detailed and accurate engineering simulations. One of the specific challenges in existing RT systems is patient motion, which limits treatment accuracy. Although motion management is implemented in existing RT systems to some extent, PHASER aims to deliver the treatment dose so fast that the effects of motion are essentially eliminated. To achieve this, the design of novel RF components is necessary, requiring electromagnetic and thermal simulations.

Bangladesh, with the world's largest inland waterway transport (IWT) system, was struggling to keep pace with the growing transport demand due to outdated infrastructure. The IWT network was losing passengers to rail and road transport, despite the latter's higher costs and longer routes. To address this, the Bangladesh Inland Water Transport Authority proposed the development of new major IWT terminals in four locations. Voyants Solutions was hired to develop these terminals, which required conducting 20-year traffic assessments, feasibility studies, and providing design and construction management. The project aimed to modernize the infrastructure to reduce congestion, meet international standards, and design a structure that reflected the country's cultural heritage. The project also had to consider the safety and comfort of passengers, efficient passenger and vehicular flow, intermodal connectivity, and accessibility for elderly and specially-abled riders.

Águas do Porto (AdP), the water utility responsible for the integrated management of the entire urban water cycle of the city of Oporto, Portugal, faced challenges due to the density and complexity of the hydraulic infrastructure and water resources. The need for integrated management of the urban water cycle was paramount, but integrating the vast number of existing systems throughout the company was a significant challenge. The data gathered simultaneously from a wide range of systems and sources, spread over dozens of individual software systems, needed to be integrated into a single platform. The main challenge in the implementation of the system was the city water cycle scale, which required detailed resolution for many models and domains, including meteorology, water supply, sewer, and storm drainage. The city water scale also required the ability to consume large amounts of data from real-time sensors and consumers’ telemetry and billing.

Águas do Porto (AdP), a major water company in Portugal, is responsible for managing the entire urban water cycle of the city of Porto. This includes water supply, wastewater drainage and treatment, stormwater drainage, surface waters, and coastal water quality. The company serves approximately 500,000 people, delivering an average of 49,450 cubic meters of water daily and collecting the same amount for treatment. The system includes extensive kilometers of wastewater sewers, stormwater drainage pipes, streams, and ocean coast. The hydraulic infrastructure and water resources in Porto had become dense and complex due to a growing number of tourists, with over 1.5 million people visiting Porto in 2017 alone. To improve water system management and system resilience, AdP needed to create models for various systems that incorporate weather forecasts, water supply, sewer flow, and storm drainage rates. These models would consume large amounts of data from sensors throughout the system, including sensors measuring customer water use and billing. AdP gathered all water system data within dozens of siloed software systems. However, finding information and gaining actionable insights became difficult as the volume of data increased. To manage the growing number of systems and data sources and provide reliable service to its customers, AdP decided that establishing an integrated management system was paramount for handling the entire urban water cycle effectively.

The High Speed 2 (HS2) railway project, the largest construction contract in Europe, was a complex and challenging initiative for the United Kingdom. The project aimed to triple the country's transport network capacity by carrying more than 30,000 passengers per day. Skanska Costain STRABAG JV (SCS) was contracted to perform civil works for the first phase of HS2, which involved a line running 230 kilometers between London and Birmingham. The contract required early contractor involvement with the designers to formulate and approve a conceptual design scheme for 26 kilometers of high-speed railway within 14 months. The project, estimated at GBP 1.5 million, presented engineering and coordination challenges to optimize efficiency and meet the client’s digital BIM demands. SCS needed interoperable technology to implement a comprehensive, collaborative BIM strategy to accommodate the existing British railway systems and approximately 6,000 utility assets, and to coordinate a geographically-dispersed, multidiscipline team.

AAEngineering Group was tasked with the design, procurement, and construction of a new gold processing plant in Aksu, Akmola Region, Kazakhstan. The project was part of an initiative by gold producer Altynalmas to expand their annual ore processing production up to 5 million tons. The USD 230 million project included the construction of a new gold processing plant, a dam, accommodation camp for 600 people, water pipelines, and a 220-kilovolt electrical substation. The challenge was to upgrade the existing energy and mining infrastructure, ensure environmental protection and occupational safety, and determine an optimal construction site that mandated a 1,000-meter sanitary protection zone from adjacent pits and uranium dams. The new plant also needed to be interoperable with the existing processing facilities in terms of equipment and materials, and seamlessly integrate with the operating systems. Additionally, AAEngineering faced challenges meeting the technology demands to comply with the client’s Digital Mine initiative on a tight timeline, compounded by coordinating a remote team during the COVID-19 pandemic.

AAEngineering was tasked with the design and construction of a gold processing plant in the seismic Talas region of Kyrgyzstan, amid a global pandemic. The USD 75 million project was located at an altitude of 3,500-meters in a dangerously seismic area with seismicity up to 10 magnitudes and increased risk of avalanches due to slopes reaching 75 degrees. The project location presented extreme conditions and was subject to strict environmental standards. In addition to the geographical and geological complications, AAEngineering had to also overcome technical, engineering, and coordination challenges among the globally dispersed project team, as well as accommodate the limited construction period. The area has a very short construction season, lasting only four or five months. It rains the rest of the time. They sought to simultaneously organize and perform multidiscipline design and construction works. To carry out these processes concurrently required integrated digital workflows and accurate modeling and analysis applications for visualization and simulation.

Anddes Asociados S.A.C., a rapidly growing Peruvian consulting company, was tasked with conducting a 3D slope stability analysis of a local mining company’s waste dump. The waste dump had a complex layout with many different soil layers at the foundation, which significantly affected its stability. The project required an extensive geotechnical investigation program for waste rock and soil foundation characterization. The challenge was to find a reliable 3D slope stability program that could handle the variability of strong and weak layers in the waste dump toe foundation, actual dike geometry, and actual 3D geometry. The program needed to accurately represent the 3D waste dump stacking and provide a comprehensive analysis of the stability of the waste dump.

The San Francisco-based Pacific Gas & Electric Company (PG&E) owns and operates over 1,000 transmission and distribution substations across two-thirds of California. The Substation Engineering Department was struggling to keep up with the volume of projects due to the push to modernize the electric grid. About 95% of the utility’s USD 1 billion substation budget goes to brownfield locations, where existing infrastructure is primarily documented by 2D drawings. The practice of manually converting 2D drawings to 3D models for use on retrofit projects was time-consuming and inaccurate. The laborious process started with the engineers taking the existing 2D drawings of the facilities and filling in information gaps with field measurements. After about 120 hours of manual effort, the resulting models were frequently inaccurate due to errors in the legacy documentation and because the engineers were unable to go on-site to measure energized equipment.

SMRT Trains, the first rail operator in Singapore, operates and maintains over 282 kilometers of rail track. With an average daily ridership of over 2 million people in 2020, SMRT needed a method to keep the tracks in good condition to avoid delays and ensure reliability. They measure the system’s reliability using mean kilometers between failure (MKBF), where a failure is defined as a service delay of more than five minutes. To improve their reliability, SMRT set a target of 1 million MKBF for all their lines. However, they were relying on intensive, time-consuming, and manual maintenance planning using tens of millions of data points per year across separate data silos. They needed to upgrade their legacy processes and improve their maintenance strategy.

National Grid, a utility company, initiated a project to replace the nearly 100-year-old South Street Substation in Providence, Rhode Island. The project involved rebuilding the 115/11.5/23-kilovolt indoor substation and relocating it to a congested area of Providence. The engineering, procurement, and construction (EPC) contract was awarded to TRC, an engineering, environmental consulting, and construction management firm. The contract required the removal and conversion of three 115-kilovolt overhead supply lines to underground cable circuits, rerouting of 27 existing 23-kilovolt and 11-kilovolt feeders from the old facility to the new substation, and rewiring of 47 sets of cables and 60 pieces of switchgear. The project presented numerous design and coordination challenges, including an aggressive timeline, tight budget, and the need to integrate existing conditions with the new construction while keeping the original substation operational.

The East 138th Street Bridge, built in 1938, is a critical part of New York City's traffic grid, accommodating over 150,000 vehicles daily. However, the bridge's limited vertical clearance has led to numerous accidents, and its aging infrastructure was unable to handle the heavy vehicular and pedestrian traffic. The New York State Department of Transportation (NYSDOT) initiated a USD 48 million project to replace the bridge with a new 100-foot, single-span bridge. The project's complexity was compounded by the need to keep the bridge functional throughout the replacement process, the bridge's location in a busy urban area, and the onset of the COVID-19 pandemic. The project also faced challenges related to utility management, including the design of an abutment to span a 58-foot-wide opening for a future sewer line expansion. Traditional plan sheets were deemed inefficient for stakeholder and community understanding of the project, necessitating a more innovative approach.

Vermessung AVT, a private surveying company based in Austria, was facing a challenge with its dependency on Autodesk® products for its surveying tasks. The company's in-house software, Geosi, which runs as an extension on BricsCAD, was being hindered due to the dependency on AutoCAD®. This led to a stagnation of Geosi sales, affecting the company's overall performance. The company's goal was to deliver high-quality products at a competitive price level to their domestic and international clients, but the licensing model of Autodesk® products, which offered subscriptions instead of permanent licenses, was a major obstacle. AVT's subsidiary, IDC EDV GmbH, had developed the software suite Geosi for all sorts of surveying tasks, and the dependency on AutoCAD® was affecting its functionality and market position.

Cavium, a company that develops highly integrated semiconductor processors, was facing a significant challenge in their PCB design process. The manual process of board routing was time-consuming, especially as chips increasingly used standards-based high-speed interfaces, had increasingly sensitive signals, and had more complex electrical and layout implementation constraints. The company's Post-Silicon Validation team, responsible for designing evaluation boards to confirm the correct operation and electrical characteristics of the company’s network processors, was spending 8 to 12 weeks on routing critical high-speed signals by hand. This was without using additional human resources. As the volume of chips requiring evaluation boards grew, schedule pressures were increasing. The team needed to have their boards ready when the chip came back from the fab, and as the number of network processors offered by Cavium increased, so did the number of designs.

QLogic, a leader in converged networking, enterprise Ethernet, and storage area networking (SAN) products, was faced with the challenge of quickly producing a sophisticated new network switch to capture market share. The company needed to consistently deliver technologies that transform data centers and storage networks globally. The challenge was to speed up the design and verification of a complex new network switch, a multi-million-gate system on chip (SoC), to drive scalable, non-blocking switch architectures across various protocols required from data center-class switching solutions. The complexity of the new design and the need to simulate the full ASIC before tapeout added to the challenge.

Spansion, a leading provider of Flash memory technology, faced significant challenges in improving designer productivity and compressing time to market. The company's electronic design automation (EDA) tools were no longer sufficient, and a more automated, industry-standard solution was needed. The company also sought to incorporate a more automated approach to custom layout and adopt a front-to-back analog/mixed-signal design flow. The process design kit (PDK), a complete set of technology files enabling analog/mixed-signal custom IC circuit design, was a critical component of this design flow. However, the development and testing of PDKs were time-consuming and costly.

Xilinx, a leading FPGA provider, offers a variety of soft and hard IP cores to its customers. These IP cores represent hundreds of communication standards, memory interfaces, DSP functions, floating point operators, interconnects, and CPUs. However, the company faced a significant challenge in testing its IP designs with all relevant combinations of parameter values. This exhaustive process required testing all major design modes with all possible data-width values. The conventional solution of creating an exhaustive permutation set of all parameters was not feasible due to the high number of combinations and the long turnaround time for running a regression. Xilinx needed a solution that could randomly generate parameter sets, considering the legal values of all parameters and the dependencies between them, while avoiding parameter set repetition and redundant duplication of test suite regressions.

RivieraWaves, a startup specializing in wireless connectivity semiconductor intellectual property (IP), faced a significant challenge in producing highly differentiated low-power Bluetooth 4.1 IP within aggressive timeframes. The company had been using Open Verification Methodology (OVM) for its Bluetooth 4.0 designs. However, due to a competitive need to increase automation and produce low-power products in shorter time-to-market windows, RivieraWaves decided to migrate to Universal Verification Methodology (UVM) for its next-generation Bluetooth 4.1 IP designs. The company needed a verification environment and solution that would keep pace with this migration and enable faster IP verification and integration into Bluetooth devices than previously possible. The challenge also included finding bugs faster and sooner, effectively managing new, complex IP challenges, and meeting robustness goals while achieving new levels of efficiency.

Nufront, a Chinese technology company, was tasked with the challenge of developing its third-generation mobile computing chip, the NS115, based on the ARM® Cortex™-A9 dual-core processor. The company had to adhere to strict mobile-computing platform requirements, achieve extremely low levels of power consumption, and ensure a high level of performance. The design team’s challenge was to verify and emulate the chip with a focus on performance and power with Android applications. The NS115 required a complex design with 12 million (12M) gates and had to meet Android system requirements, including the need for external storage, multiple screen displays, the ability to accept data input from various sources, and a long lead-time for IC simulation. The Nufront team felt that register-transfer level (RTL) simulation would be too slow for system-level verification, and frequent design iterations and the lack of full debug visibility wasn’t suitable to choose a field-programmable gate array (FPGA)-based solution.

Tait Communications, a New Zealand-based company that designs and manages digital wireless communications environments, was facing significant challenges in managing schematic and footprint library models. The process was manual, involving spreadsheets and custom-written scripts and utilities, which was both time-consuming and labor-intensive. The company often duplicated efforts due to difficulties in locating specific parts among the thousands they manage. The manual methodology was also prone to errors, leading to inconsistent and inaccurate results. Additionally, Tait needed a solution that could manage design reuse modules, as their PCB designs were unique and subject to various rigid requirements and regulations. They needed version control and the ability to guarantee the accuracy of the components on their boards.

Newport Media, a fabless semiconductor company, was faced with the challenge of delivering highly integrated receiver solutions with unprecedented performance, power consumption, size, and cost-efficiency. The company's development team was tasked with developing the verification environment for a new version of the design featuring an external bus interface. The block under verification featured 40K logic gates, including an AHB master/slave interface, an external microprocessor interface, and a direct memory access (DMA) engine. The team needed to expose hard-to-find bugs early in the design cycle of AHB master/slave to verify protocol compliance and write more extensive tests to uncover and explore corner cases.

Fujitsu Microelectronics Limited, a global leader in microelectronics for computers and communication devices, was faced with the challenge of making mobile WiMAX a reality by reducing chip size and power requirements. The key to achieving this was optimizing the power design for the lowest possible overall usage and shutoff leakage. Previously, independent decisions made at each stage of the design process often impacted other areas in unforeseen ways, adversely affecting the final power characteristics. The challenge was further compounded by the need to align power design around CPF with accurate simulation, move to smaller geometries, reduce design time, and improve the quality of silicon.

NetSpeed Systems, a provider of scalable, coherent, on-chip network (NoC) IPs to system-on-chip (SoC) designers, faced significant challenges in designing its cache-coherent NoC solution, Gemini. The product's flexibility allowed for an endless number of configurations, necessitating an astronomical number of test cases. This posed a risk of introducing prolonged delays in the development schedule. Additionally, the coherency verification process was deeply stateful, requiring long runs to accumulate internal chip states and hit corner cases. Coherency bugs were unforgiving, with a single bug capable of bringing down the entire product. The vast verification space, including a large warm-up period and the need to expose bugs that manifest only after millions of cycles, added to the complexity. The company needed a solution that could provide comprehensive test coverage in this massive verification space, generate all possible NoC configurations, provide an intelligent, coordinated stimulus for the test cases, and enable efficient debugging and reproduction of errors.

Freescale Semiconductor, a leader in embedded processing solutions, faced a significant challenge in improving the efficiency of top-level verification of mixed-signal Systems on Chip (SoCs). The company's analog and sensors division, which primarily manages analog components, was grappling with the increasing use of digital logic in new projects. Most analog engineers had limited expertise in design verification languages, yet their involvement in executing top-level verification of mixed-signal SoCs was crucial. The traditional testbenches created by analog engineers were based on schematic entry and multiple configuration views, and relied on waveform inspection. However, advanced verification methodologies were typically digital-centric, command-line driven, and based on object-oriented languages such as SystemVerilog. This posed a significant challenge in bridging the gap between analog and digital verification methodologies.

Uniquify, a leading provider of system-on-chip (SoC) design, manufacturing, and intellectual property solutions, faced the challenge of maintaining its high customer satisfaction levels and reputation by achieving 100% tapeout success. The company had set a high bar for itself in multiple application domains, including image processing, networking, digital television, DSL, mobile phones, digital cameras and displays, multimedia processing, and audio processing. To meet today’s aggressive performance, power, and cost goals, Uniquify engineers had to perform comprehensive physical design space exploration and feasibility analysis early in the design process. Given the complexity and size of today’s designs, they needed systems with the capacity to handle 100M instances and more.

Teradyne, a leader in providing automatic test equipment (ATE) to component manufacturers, was faced with the challenge of improving the productivity and quality of silicon. The company designs systems with advanced custom chip sets and wanted to implement a single, flexible methodology for use in its design and verification of complex mixed-signal systems on chip (SoCs), and across a wide range of other integrated circuits (ICs). Key considerations for Teradyne were simulation capacity for very complex analog mixed-signal designs and the ability to dynamically adapt to changing design priorities. The design challenges included complex analog and mixed-signal SoC simulations and a wide variety of applications and test priorities.