Cadence Design Systems
Case Studies
Accelerating Timing Closure on High-Speed Interfaces with Allegro TimingVision Environment: A Cavium and Cadence Case Study
Overview
Accelerating Timing Closure on High-Speed Interfaces with Allegro TimingVision Environment: A Cavium and Cadence Case StudyCadence Design Systems |
Networks & Connectivity - Gateways Processors & Edge Intelligence - Microcontrollers & Printed Circuit Boards | |
Electrical Grids Equipment & Machinery | |
Human Resources Product Research & Development | |
Vehicle Telematics Visual Quality Detection | |
Hardware Design & Engineering Services Testing & Certification | |
Operational Impact
The implementation of the Allegro TimingVision environment has significantly transformed Cavium’s PCB design process. The real-time, color-coded visual feedback on timing and phase information right on their design canvas has eliminated the need to switch back and forth between their design canvas and Allegro Constraint Manager. The technology’s embedded timing engine analyzes signal interdependencies to develop smart delay and phase targets, allowing for a more efficient and accurate design process. The team can now handle a larger volume of board designs without having to spend all night in the office. The high-quality Allegro tools have enabled them to deliver high-quality work with greater efficiency than in the past. The team has also learned valuable lessons in the process, such as routing DDR4 signals spaced at 5X the line width for better noise/coupling immunity and ensuring that differential pairs are all matched before trying to match lengths for all signals in a byte lane. | |
Quantitative Benefit
4X faster timing closure, without compromise on quality | |
Ability to take on increased volume of PCB designs with existing resources | |
Faster 'what-if' analysis with fewer layers for boards for routing DDRx interfaces | |