Cadence Design Systems Case Studies Teradyne's Productivity and Quality Improvement with Cadence's Virtuoso Multi-Mode Simulation

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	Teradyne's Productivity and Quality Improvement with Cadence's Virtuoso Multi-Mode Simulation Cadence Design Systems

Teradyne's Productivity and Quality Improvement with Cadence's Virtuoso Multi-Mode Simulation

Cadence Design Systems

Technology Category	Analytics & Modeling - Digital Twin / Simulation Networks & Connectivity - RF Transceivers
Applicable Industries	Electronics Semiconductors
Applicable Functions	Product Research & Development Quality Assurance
Use Cases	Digital Twin Virtual Reality
Services	Testing & Certification
Challenge	Teradyne, a leader in providing automatic test equipment (ATE) to component manufacturers, was faced with the challenge of improving the productivity and quality of silicon. The company designs systems with advanced custom chip sets and wanted to implement a single, flexible methodology for use in its design and verification of complex mixed-signal systems on chip (SoCs), and across a wide range of other integrated circuits (ICs). Key considerations for Teradyne were simulation capacity for very complex analog mixed-signal designs and the ability to dynamically adapt to changing design priorities. The design challenges included complex analog and mixed-signal SoC simulations and a wide variety of applications and test priorities. Read More
About Customer	Teradyne is a company based in North Reading, Massachusetts. Since 1960, it has been a leader in providing automatic test equipment (ATE) to component manufacturers. Today, the company manufactures ATE systems for virtually every type of electronics, semiconductor, and communications application for companies worldwide. Each of these systems is designed with advanced custom chip sets. Teradyne wanted to implement a single, flexible methodology for use in its design and verification of complex mixed-signal systems on chip (SoCs), and across a wide range of other integrated circuits (ICs). Read More
Solution	Cadence provided a solution to Teradyne’s substantial system-level requirements with comprehensive Cadence® Virtuoso® Multi-Mode Simulation technology. This technology provides designers with a complete design and verification environment for analog, radio frequency (RF), mixed-signal, memory, and SoC designs. It combines the industry’s leading SPICE, FastSPICE, RF, and analog/mixed-signal simulators in a unique shared-licensing package. Teradyne used this platform to successfully develop an extremely complex mixed-signal SoC. The functional verification of this design required numerous individual simulations, building into a single complex full-chip simulation. Cadence's flexible token-based licensing allows Teradyne to use whatever subset of simulation technology it wants at any given time, and change the mix whenever its needs change—without having to purchase the entire set of fixed licenses. Read More Log in to view content
Contents

Technology Category

Analytics & Modeling - Digital Twin / Simulation

Networks & Connectivity - RF Transceivers

Applicable Industries

Electronics

Semiconductors

Applicable Functions

Product Research & Development

Quality Assurance

Use Cases

Digital Twin

Virtual Reality

Services

Testing & Certification

Challenge

Teradyne, a leader in providing automatic test equipment (ATE) to component manufacturers, was faced with the challenge of improving the productivity and quality of silicon. The company designs systems with advanced custom chip sets and wanted to implement a single, flexible methodology for use in its design and verification of complex mixed-signal systems on chip (SoCs), and across a wide range of other integrated circuits (ICs). Key considerations for Teradyne were simulation capacity for very complex analog mixed-signal designs and the ability to dynamically adapt to changing design priorities. The design challenges included complex analog and mixed-signal SoC simulations and a wide variety of applications and test priorities.

About Customer

Teradyne is a company based in North Reading, Massachusetts. Since 1960, it has been a leader in providing automatic test equipment (ATE) to component manufacturers. Today, the company manufactures ATE systems for virtually every type of electronics, semiconductor, and communications application for companies worldwide. Each of these systems is designed with advanced custom chip sets. Teradyne wanted to implement a single, flexible methodology for use in its design and verification of complex mixed-signal systems on chip (SoCs), and across a wide range of other integrated circuits (ICs).

Solution

Cadence provided a solution to Teradyne’s substantial system-level requirements with comprehensive Cadence® Virtuoso® Multi-Mode Simulation technology. This technology provides designers with a complete design and verification environment for analog, radio frequency (RF), mixed-signal, memory, and SoC designs. It combines the industry’s leading SPICE, FastSPICE, RF, and analog/mixed-signal simulators in a unique shared-licensing package. Teradyne used this platform to successfully develop an extremely complex mixed-signal SoC. The functional verification of this design required numerous individual simulations, building into a single complex full-chip simulation. Cadence's flexible token-based licensing allows Teradyne to use whatever subset of simulation technology it wants at any given time, and change the mix whenever its needs change—without having to purchase the entire set of fixed licenses.

Impact #1	The adoption of the Virtuoso Multi-Mode Simulation package has led to a fundamental change in Teradyne’s design and verification workflow, simulation capacity and overall methodology. It provides the complete solution for design and verification of analog mixed-signal SoCs in a consistent technology platform. By providing the complete solution, Cadence reduces the design cycle and rework costs. This has resulted in Teradyne making Virtuoso Multi-Mode Simulation the core of their current major chip development projects. This kind of confidence comes from successful experience.

Impact #1

The adoption of the Virtuoso Multi-Mode Simulation package has led to a fundamental change in Teradyne’s design and verification workflow, simulation capacity and overall methodology. It provides the complete solution for design and verification of analog mixed-signal SoCs in a consistent technology platform. By providing the complete solution, Cadence reduces the design cycle and rework costs. This has resulted in Teradyne making Virtuoso Multi-Mode Simulation the core of their current major chip development projects. This kind of confidence comes from successful experience.

Benefit #1	Flexible simulation solutions over a wide range of design verification requirements due to token-based licensing model
Benefit #2	Increased speed to market from a single testbench configuration directly integrated to the design process
Benefit #3	Significant positive impact on development schedules and final silicon quality due to a change in perspective and methodology

Benefit #1

Flexible simulation solutions over a wide range of design verification requirements due to token-based licensing model

Benefit #2

Increased speed to market from a single testbench configuration directly integrated to the design process

Benefit #3

Significant positive impact on development schedules and final silicon quality due to a change in perspective and methodology

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Overview

Teradyne's Productivity and Quality Improvement with Cadence's Virtuoso Multi-Mode Simulation

Operational Impact

Quantitative Benefit