Cadence Design Systems Case Studies Faraday's Transformation with Cadence's Encounter Conformal ECO Designer

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	Faraday's Transformation with Cadence's Encounter Conformal ECO Designer Cadence Design Systems

Faraday's Transformation with Cadence's Encounter Conformal ECO Designer

Cadence Design Systems

Technology Category	Processors & Edge Intelligence - System on a Chip Sensors - Liquid Detection Sensors
Applicable Industries	Buildings Equipment & Machinery
Applicable Functions	Product Research & Development
Use Cases	Time Sensitive Networking
Challenge	Faraday Technology Corporation, a leading fabless ASIC vendor and SIP provider, faced a significant challenge in updating its engineering change order (ECO) process. The ECO process involves inserting a logic change directly into the netlist after an automatic tool has already processed it. This could include anything from adding or removing logic in a design to a more subtle change such as cleaning up routing for signal integrity. However, ECOs can be stressful and time-consuming. Traditional manual ECO flows are labor-intensive and limited in their ability to ensure that a product will function properly. Designers often don't know if a change made in the logical netlist can be executed in the physical netlist, making the manual ECO process time-consuming and effort-intensive. It was also difficult to accurately keep track of used spare cells and freed cells. Read More
About Customer	Faraday Technology Corporation is a leading fabless ASIC vendor and silicon intellectual property (SIP) provider. The company's success is built on its ability to provide highly customized solutions for its customers. Faraday's proven and recognized ASIC, system-on-chip (SoC), and intellectual property (IP) design capabilities and services enable customers to realize their ideas in silicon—better and faster—and to gain a competitive edge through lower cost and higher product differentiation. Since its launch in 1993, Faraday has provided professional ASIC design services, equipped with a well-developed ASIC infrastructure and team members with an average of more than 10 years of experience. Faraday's in-house IP includes thousands of ARM-compliant CPUs, high-speed I/Os, memory interfaces, and fundamental IPs such as libraries, memories, PLLs, and regulators. Read More
Solution	To address its ECO challenges, Faraday decided to implement Cadence's Encounter Conformal ECO Designer. This tool offers functional ECO analysis and optimization, and generation capability. It combines proven equivalence and functional checks, and uses formal techniques to analyze, abstract, and implement ECOs. Conformal ECO Designer compares each logic cone in the design, determines which cones are different, and identifies what changes are required to complete the ECO. This minimizes the number of changes and reduces the impact on back-end processing, which accelerates turnaround time. In the post-mask flow, ECO changes are mapped to available gates or freed gates. Conformal ECO Designer informs the user about any resource shortages. This solution allowed Faraday to handle complex ECOs that would otherwise take a significant amount of time and may even be impossible to perform using traditional manual methods. Read More Log in to view content
Contents

Technology Category

Processors & Edge Intelligence - System on a Chip

Sensors - Liquid Detection Sensors

Applicable Industries

Buildings

Equipment & Machinery

Applicable Functions

Product Research & Development

Use Cases

Time Sensitive Networking

Challenge

Faraday Technology Corporation, a leading fabless ASIC vendor and SIP provider, faced a significant challenge in updating its engineering change order (ECO) process. The ECO process involves inserting a logic change directly into the netlist after an automatic tool has already processed it. This could include anything from adding or removing logic in a design to a more subtle change such as cleaning up routing for signal integrity. However, ECOs can be stressful and time-consuming. Traditional manual ECO flows are labor-intensive and limited in their ability to ensure that a product will function properly. Designers often don't know if a change made in the logical netlist can be executed in the physical netlist, making the manual ECO process time-consuming and effort-intensive. It was also difficult to accurately keep track of used spare cells and freed cells.

About Customer

Faraday Technology Corporation is a leading fabless ASIC vendor and silicon intellectual property (SIP) provider. The company's success is built on its ability to provide highly customized solutions for its customers. Faraday's proven and recognized ASIC, system-on-chip (SoC), and intellectual property (IP) design capabilities and services enable customers to realize their ideas in silicon—better and faster—and to gain a competitive edge through lower cost and higher product differentiation. Since its launch in 1993, Faraday has provided professional ASIC design services, equipped with a well-developed ASIC infrastructure and team members with an average of more than 10 years of experience. Faraday's in-house IP includes thousands of ARM-compliant CPUs, high-speed I/Os, memory interfaces, and fundamental IPs such as libraries, memories, PLLs, and regulators.

Solution

To address its ECO challenges, Faraday decided to implement Cadence's Encounter Conformal ECO Designer. This tool offers functional ECO analysis and optimization, and generation capability. It combines proven equivalence and functional checks, and uses formal techniques to analyze, abstract, and implement ECOs. Conformal ECO Designer compares each logic cone in the design, determines which cones are different, and identifies what changes are required to complete the ECO. This minimizes the number of changes and reduces the impact on back-end processing, which accelerates turnaround time. In the post-mask flow, ECO changes are mapped to available gates or freed gates. Conformal ECO Designer informs the user about any resource shortages. This solution allowed Faraday to handle complex ECOs that would otherwise take a significant amount of time and may even be impossible to perform using traditional manual methods.

Impact #1	Since adopting Conformal ECO Designer in 2010, Faraday has successfully used the tool on more than 30 ASIC tapeout designs. The team has experienced amazing runtime when Conformal ECO Designer accepts the ECO setting. Using Conformal ECO Designer, Faraday has developed a fast and efficient ECO flow to handle functional logic changes compared to its previous traditional manual process. This has not only improved the efficiency of the ECO process but also reduced the risk of quality issues and schedule slips. The solution has enabled Faraday to consistently provide highly differentiated ASIC, SoC, and IP designs to customers while achieving lower cost and faster time to market.

Impact #1

Since adopting Conformal ECO Designer in 2010, Faraday has successfully used the tool on more than 30 ASIC tapeout designs. The team has experienced amazing runtime when Conformal ECO Designer accepts the ECO setting. Using Conformal ECO Designer, Faraday has developed a fast and efficient ECO flow to handle functional logic changes compared to its previous traditional manual process. This has not only improved the efficiency of the ECO process but also reduced the risk of quality issues and schedule slips. The solution has enabled Faraday to consistently provide highly differentiated ASIC, SoC, and IP designs to customers while achieving lower cost and faster time to market.

Benefit #1	Achieved faster functional ECO implementation turnaround time by minimizing manual work and time-consuming iterations
Benefit #2	Gained the ability to implement complex ECOs, a task nearly impossible using the traditional manual process
Benefit #3	Achieved earlier netlist handoff to customers

Benefit #1

Achieved faster functional ECO implementation turnaround time by minimizing manual work and time-consuming iterations

Benefit #2

Gained the ability to implement complex ECOs, a task nearly impossible using the traditional manual process

Benefit #3

Achieved earlier netlist handoff to customers

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Overview

Faraday's Transformation with Cadence's Encounter Conformal ECO Designer

Operational Impact

Quantitative Benefit